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CDB43L22
6. JUMPER SETTINGS
JMP
J31
J36
J25
J28
J52
J47
J74
J53
J48
J13
J14
J16
J17
J11
J12
J20
J23
J15
J19
J3
J9
J1
J2
J22
J34
J5
LABEL
VL
VA_HP
VA
VD
VL
+VA_HP
VA
VD
VP
[No Label]
[No Label]
[No Label]
[No Label]
MONO
MONO
HP B LOAD
HP A LOAD
LEFT CH
RIGHT CH
HP DETECT
Board Power
VP
PURPOSE
Selects source of voltage for the
VL supply
Selects source of voltage for the
VA_HP supply
Selects source of voltage for the
VA supply
Selects source of voltage for the
VD supply
Current Measurement
Current measurement
Applies a filtered or a non-filtered
version of the SPKA- signal to J60
Applies a filtered or a non-filtered
version of the SPKA+ signal to J59
Applies a filtered or a non-filtered
version of the SPKB- signal to
J101
Applies a filtered or a non-filtered
version of the SPKA- signal to J99
Applies a short between SPKOUT
A+ and A-. (Used only after
MONO function is enabled in the
CS43L22)
Applies a short between SPKOUT
B+ and B-. (Used only after
MONO function is enabled in the
CS43L22)
Selects 32 or 16 Ω load for
HP/LINE_OUTB (DAC out)
Selects 32 or 16 Ω load for
HP/LINE_OUTA (DAC out)
Selects between a filtered or non
filtered version of the
HP/LINE_OUTA signal.
Selects between a filtered or non
filtered version of the
HP/LINE_OUTB signal.
Selects the control source for the
SPKR/HP pin
Selects either USB or External
+5 V power for the board
Selects either External or Battery
power for VP and for the buck reg-
ulators that powers VA, VA_HP
and VD
POSITION
*+1.8V
+2.5V
+3.3V
*+1.8V
+2.5V
*+1.8V
+2.5V
*+1.8V
+2.5V
*SHUNTED
OPEN
*SHUNTED
*1 - 2
2-3
*1 - 2
2-3
*1 - 2
2-3
*1 - 2
2-3
*OPEN
SHUNTED
*OPEN
SHUNTED
1-2
2-3
1-2
2-3
1-2
*2 - 3
1-2
*2 - 3
1-2
*2 - 3
1-2
*2 - 3
*1 - 2
2-3
FUNCTION SELECTED
Voltage source is +1.8 V regulator.
Voltage source is +2.5 V regulator.
Voltage source is +3.3 V regulator.
Voltage source is +1.8 V regulator.
Voltage source is +2.5 V regulator.
Voltage source is +1.8 V regulator.
Voltage source is +2.5 V regulator.
Voltage source is +1.8 V regulator.
Voltage source is +2.5 V regulator.
1 Ω series resistor is shorted.
1 Ω series resistor in power supply path.
VP supply to CS43L22 is selected.
SPKOUTA- output routed to J60.
SPKOUTA- output not routed to J60.
SPKOUTA+ output routed to J59.
SPKOUTA+ output not routed to J59.
SPKOUTB- output routed to J101.
SPKOUTB- output not routed to J101.
SPKOUTB+ output routed to J99.
SPKOUTB+ output not routed to J99.
Channel A+ and A- to J59 and J60 respec-
tively.
Channel + to J59 and J60 respectively.
Channel B+ and B- to J99 and J101 respec-
tively.
Channel - to J99 and J101 respectively.
16 Ω load selected.
32 Ω load selected.
16 Ω load selected.
32 Ω load selected.
Non-filtered HP/LINE_OUTA to HP/Line Jack.
Filtered HP/LINE_OUTA to HP/Line Jack.
Non-filtered HP/LINE_OUTA to HP/Line Jack.
Filtered HP/LINE_OUTA to HP/Line Jack.
FPGA.
HP Jack.
External +5 V power.
USB generated +5 V power. (USB hub must be
capable of greater than 300 mA)
External from J35.
Battery from BT1-BT3 (bottom side)
Table 5. Jumper Settings
18
DS792DB1
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